中英
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debugging time中文是什么意思
發音:
- 中文翻譯
- 造句
- 調試時間
- debug vt. (-bugged; -bugging) 1.驅除 ...
- time n. 1.時，時間，時日，歲月。 2.時候，時刻；期間； ...
- just-in-time debugging 實時調試
- real time debugging routine 實時調試程序
- run time debugging aid 運行時調試輔助程序
- run time debugging facilities 運行時調試功能
- run time debugging language 運行時調試語言
- rda run time debugging aid 運行期間調試助手
- debugging 程序調整; 除去工藝; 堤序; 調試 發現和去除軟件失效根源的過程。; 調試來源; 調試排除故障排除程序中錯誤; 調諧發現并排除計算機故障; 故障的排除; 排除錯誤; 消除故障
- arithmetic debugging 運算調試; 運算排錯
- asynchronous debugging 異步調試; 異步排錯
- automatic debugging 自動查錯; 自動調試
- automation of debugging 調試自動化
- board debugging 基板調試
- breakpoint debugging 斷點調試
- cabinet debugging 控制臺調試
- connected debugging 對接聯調
- console debugging 控制臺除錯; 控制臺調試
- control debugging 控制臺調整
- debugging activity 調試活動
- debugging aid 調試輔助程序; 調試輔助手段, 調試工具; 調試工具
- debugging aids 翟輔助程序; 調試輔助程序; 調試工具
- debugging by backtracking 回溯糾錯
- debugging by induction 歸納法糾錯
- debugging c c 程序調試實用手冊
- The trend is to write compilers in high-level languages, because of the reduced amount of programming time and debugging time .
目前傾向使用高級語言編寫編譯程序，因為這減少了大量的編程序和調程序的時間。 - This allows a component creator to ship the visualizer in a dll to be called only at debug time
這樣一來，組件創建者便可以通過僅在調試時調用的dll提供可視化工具。 - Ensures that all variables are declared and spelled correctly , which reduces debugging time . the
可確保所有變量的聲明方式和拼寫方式均正確無誤，這樣就縮短了調試時間。 - At the same time , the signal integrity about the key circuit is simulated with the hyperlynx software . with which the circuit performation is enhanced , the debugging time and the cost are reduced
并且通過mentorgraphics公司的hyperlynx仿真軟件對電路關鍵部分的信號完整性進行了仿真,以此提高了電路設計的成功率,縮短了產品設計調試周期,減少了成本損失。 - The intelligentized indoors communication systems in this paper has assed the system debugging time after time , and used in slap - up dwelling house , which proves fully its rationality and feasibility , it possess the wide market foreground
本文中的智能信息家電系統已經過多次系統調試，并在高檔住宅中使用，充分證明了其合理性和可行性，具有廣闊的市場前景。 - Designer can synthesize the pci core and the user ' s logic into an fpga chip , and can do simulation analysis to test the pci core and the user ' s logic . this technique can increase the design and debugging time , develop the capability of the system
設計者可以將pci用戶邏輯與pcicore集成在一片fpga里，并且可以在頂層通過仿真來驗證pci接口以及用戶邏輯設計的正確與否，這樣可以大幅度提高調試速度，縮短開發周期，提高電路板的集成度和系統的性能。
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